6 Commits (f13ca964279330354949dd1f4cb3de411294cb52)

Author	SHA1	Message	Date
yuanjiong	e5d6cd4c83	🎨 update modules	2021-11-26 20:03:10 +08:00
scgan	354c3ebc95	typo	2021-11-10 11:34:50 +08:00
yuanjiong	9407c0c154	🔧 update xclk freq	2021-10-26 17:04:33 +08:00
yuanjiong	c5fd86cf78	🎨 update xclk to 16MHz	2021-10-25 11:57:20 +08:00
Ye Hang Yang	175985dbdf	🔧 better stack size and core arrengement	2021-09-27 15:16:11 +08:00
Ye Hang Yang	66b00a1449	♻️ common -> modules	2021-09-08 20:04:59 +08:00